Mobile Computer Architecture
On-device inference has made neural accelerator provisioning, model quantization, memory bandwidth, and energy per inference first-order mobile architecture constraints rather than specialist concerns, and AI coding agents now produce much of the profiling and kernel-level optimization work architects once wrote by hand. The course therefore budgets silicon for inference workloads and requires agent-produced analysis to be verified against measured device telemetry before it informs a design decision.
Current description → proposed description
An advanced course in current trends in Computer Architecture with a specific emphasis put on decisions related to mobile devices that needs to weigh battery life, heat, and performance more critically than traditional computer systems.
This advanced course in computer architecture examines current trends in the field with specific emphasis on design decisions for mobile and battery-powered devices, where battery life, thermal headroom, and sustained performance must be weighed far more critically than in traditional computer systems. Students study heterogeneous systems-on-chip, including asymmetric CPU clusters, graphics and neural processing units, cache organization and memory bandwidth provisioning, instruction set considerations, dynamic voltage and frequency scaling, and the thermal behavior that governs sustained throughput. Because contemporary mobile platforms increasingly execute machine learning and language model inference on the device itself, the course treats accelerator provisioning, model quantization and compression, memory bandwidth pressure, and energy per inference as first-order architectural constraints, and examines the partitioning of computation among device, edge, and cloud with attention to privacy, cost, and the availability of features across hardware tiers. Students construct benchmarking and telemetry workflows that characterize real hardware under sustained load, and evaluate performance analyses and low-level code produced by AI coding agents, treating measured evidence rather than generated claims as the basis for architectural recommendations. Coursework culminates in a defended hardware-software co-design proposal for a stated device class.
What changes
- Neural accelerator and NPU provisioning as a first-order power and area budget
- Model quantization and compression traded explicitly against latency, energy, and accuracy
- Sustained-load benchmarking and thermal telemetry in place of burst benchmark figures
- Device, edge, and cloud partitioning framed as a privacy and hardware-tier equity decision
- Verification of AI-agent-produced profiling and kernel code against measured hardware
6 proposed outcomes, mapped to 5 program outcomes
Each outcome below is written to be observable and assessable, and each is mapped to the program learning outcomes for which it produces evidence.
Students will be able to evaluate competing mobile system-on-chip design alternatives, including asymmetric CPU clusters, graphics and neural processing unit provisioning, cache organization, and memory bandwidth, against explicit energy, thermal, and sustained-throughput budgets for a stated device class, validating the resulting provisioning by deploying a quantized on-device inference workload to target or emulated silicon and measuring it against those budgets.
PLO 6.1 calls for structured deployment of models in embedded systems, and the CLO now supplies that evidence directly: the student deploys a quantized inference workload onto target or emulated mobile silicon and measures it against the energy, thermal, and throughput budgets that justified the provisioning, so the architectural judgement is validated by an actual embedded deployment rather than resting on a sizing assumption.
Students will be able to analyze the effect of model compression techniques, including quantization, pruning, distillation, and operator fusion, on inference latency, memory footprint, energy per inference, and task accuracy when a model is mapped to a specific mobile accelerator.
Measuring the accuracy a compressed model loses against the latency, memory, and energy it saves is precisely PLO 6.2's assessment of model performance and limitations against appropriate metrics, while mapping that model onto a specific mobile accelerator is PLO 6.1's deployment of models in embedded environments.
Students will be able to design a benchmarking and telemetry methodology that characterizes a mobile workload across CPU, GPU, and neural accelerator execution paths, reporting latency distributions, thermal throttling behavior, and energy per operation under sustained rather than burst load, and using the resulting diagnostics to revise the model's execution mapping or compression configuration and re-measure the effect.
PLO 6.2 pairs assessment against appropriate metrics with iterative refinement based on diagnostic results, and the CLO now closes that loop: sustained-load latency, throttling, and energy diagnostics must drive a revision of the model's execution mapping or compression configuration that the student then re-measures, leaving CLO 2 to carry the outcome's accuracy-versus-cost assessment clause.
Students will be able to justify a partitioning of computation among device, edge, and cloud that accounts for user-data privacy, connectivity and cost constraints, and the unequal availability of on-device inference between low-tier and high-tier hardware.
Deciding which user data leaves the device and who loses a capability because their phone lacks a capable accelerator is directly the privacy, accountability, and economic-access language of this outcome, which the workbook states twice in identical wording, once under Christian Faith as PLO 1.1 and again under Integrated Disciplinary Knowledge as PLO 3.2, so a CLO that supports one necessarily supports the other.
Students will be able to critique performance analyses, optimization recommendations, and kernel or firmware code produced by AI coding agents, validating each claim against measured device telemetry and documenting who remains accountable for machine-generated work that reaches shipped hardware or software.
Requiring agent-produced analysis and low-level code to be verified against measurement and attributed to an accountable engineer addresses the transparency and accountability clauses of this outcome, which the workbook states twice in identical wording, as PLO 1.1 under Christian Faith and PLO 3.2 under Integrated Disciplinary Knowledge.
Students will be able to communicate a hardware and software co-design recommendation, including its measured trade-offs among battery life, heat, latency, and model accuracy, to both engineering teams and non-technical product stakeholders.
Translating measured architectural trade-offs and their consequences for model accuracy into terms a product audience can act on is PLO 5.1's requirement to communicate AI results and their implications with clarity and responsibility to technical and non-technical audiences alike.
Program outcomes this course reaches
Filled cells are program learning outcomes with at least one supporting course learning outcome in this course. Sparse coverage is expected — no single course carries all twelve.